An integrated circuit may include N-channel metal oxide semiconductor (NMOS) transistors which are formed concurrently and are used in a variety of circuits, such as static random access memory (SRAM) circuits and low leakage logic circuits. It may be desirable to have less than a certain level of threshold mismatch in NMOS transistors in the SRAM circuits and less than a certain level of leakage current, sometimes referred to as Iddq, in NMOS transistors in the low leakage logic circuits. attaining the desired values of threshold mismatch and Iddq in NMOS transistors formed concurrently may be problematic without adding to fabrication cost and complexity of the integrated circuit.